In order to build an integrated circuit, it is necessary to fabricate many active devices on a single substrate. Initially, each of the devices must be electrically isolated from others, but later in the fabricating sequence, specific devices must be electrically interconnected so as to implement the desired circuit function. Since both MOS and bipolar VLSI and ULSI devices typically require more than one level of interconnect, multilevel-interconnect structures are used. Multilevel-interconnect structures pose a number of challenges such as planarization of the intermetal dielectric layers and filling of high-aspect-ratio contact holes and vias. See generally, Stanley Wolf, Silicon Processing For The VLSI Era, Vol. 2, Chp. 4 (1990).
Spin-on glass (SOG) may be used in the fabrication of integrated circuits for, among other things, planarization. See, e.g., U.S. Pat. No. 5,360,995, entitled "Buffered Capped Interconnect For A Semiconductor Device," which is incorporated herein by reference for all purposes. SOG is another interlevel-dielectric material that is supplied in liquid form and, therefore, exhibits planarization capabilities similar to those of polyimide films. SOG films typically provide somewhat lower degrees of planarization than do photoresists. SOG and polyimide films can both typically fill narrower spaces without causing voids in contrast to the formats of CVD intermetal dielectric films. Crevices such as those caused by closely spaced metal-1 and polysilicon edges can be planarized by SOG to a degree that allows for adequate metal step coverage.
SOG materials are typically siloxanes or silicates mixed in alcohol-based solvents. The primary difference between them being that small percentage of Si--C bonds remain in the siloxane-based SOGs following the final cure cycle. Upon baking, the solvents are driven off and the remaining solid film exhibits properties similar to those of silicon dioxide (SiO.sub.2) as opposed to the organic film in the case of polyimides. Silicate SOGs can also be doped with such compounds as P.sub.2 O.sub.5 to improve the dielectric film properties.
With respect to the formation of a SOG layer, after being spun on the substrate, the SOG may be baked first at low temperature (e.g., 150-250.degree. C. for 1-15 minutes in air), and then at a higher temperature (e.g., 400-425.degree. C. for 30-60 minutes in air). The solvent is first driven off, and water is evolved from the film due to polymerization of the silanol (SiOH) groups. The loss of considerable mass together with material shrinkage may create a tensile stress in the film.
If any particulates are dispensed by a SOG delivery nozzle onto the substrate, the results can be catastrophic with respect to integrated circuits formed on the substrate. This can be particularly a problem with SOG because SOG may dry on the nozzle or in the SOG supply pipes and become a particulate with the potential to cause failure of the integrated circuits. Because the solvents evaporate from the SOG fairly quickly after being exposed to air so as to form particulates, the dispense nozzle must be cleaned with some frequency. Without adequate cleaning, dried-SOG particulates on the nozzle can dislodge and come into contact with the substrate causing possible failure of integrated circuits formed on the substrate.